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Title:
METHOD FOR MANUFACTURING ELECTRONIC PART
Document Type and Number:
Japanese Patent JP2006083410
Kind Code:
A
Abstract:

To provide a method for inexpensively and reliably manufacturing ferro-alloy electronic parts that are surface-treated by using a metal which is not deformed by heating, does not include lead and tin, does not form a whisker and has adequate wettability to solder.

The method for manufacturing the surface-treated electronic parts comprises the steps of: forming a three-layer structure of nickel, palladium and gold on the portion to be soldered of the parts by electrolytic plating treatment, so that the palladium layer can acquire a thickness in a range of 0.007 to 0.1 μm , the gold layer can acquire a thickness in a range of 0.003 to 0.02 μm, and both thicknesses can satisfy a relationship of: thickness of gold layer is less than thickness of palladium layer; and press-forming the base material after having formed the gold layer.


Inventors:
KOBAYASHI KENICHI
Application Number:
JP2004267090A
Publication Date:
March 30, 2006
Filing Date:
September 14, 2004
Export Citation:
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Assignee:
SHINEI HITEC KK
International Classes:
C25D5/12; C23F11/00; C25D7/00; H01L23/50; H01R13/03
Domestic Patent References:
JPH09307050A1997-11-28
JPH11111402A1999-04-23
JPH10237688A1998-09-08
JPH04193982A1992-07-14
JP2005314749A2005-11-10
JPH04115558A1992-04-16
JPH04337657A1992-11-25
JPH11238569A1999-08-31
JPH10313087A1998-11-24
Attorney, Agent or Firm:
Masuo Oiwa