Title:
METHOD FOR MANUFACTURING EXTRA-THIN WIRE OF COMPOUND SEMICONDUCTOR, AND ASSEMBLY OF EXTRA-THIN WIRE OF COMPOUND SEMICONDUCTOR
Document Type and Number:
Japanese Patent JP2011162844
Kind Code:
A
Abstract:
To provide a method for manufacturing an extra-thin wire of a compound semiconductor with high precision, which is suitable for mass production, and to provide an assembly of the extra-thin wire of the compound semiconductor.
The manufacturing method includes: filling a fine through-hole of a template having a plurality of fine through-holes with a nanosize with the compound semiconductor by using an electrodeposition method; or filling the fine through-hole alternately with a first element and a second element which are constituent elements of the compound semiconductor into a layer state, and then diffusion-heat-treating the first element and the second element.
More Like This:
| JPH0475314 | PLATING METHOD OF LEAD TRERMINAL |
Inventors:
OKAI TAKESHI
TAKAO KEIZO
KAGAWA AKIO
TAKAO KEIZO
KAGAWA AKIO
Application Number:
JP2010026986A
Publication Date:
August 25, 2011
Filing Date:
February 09, 2010
Export Citation:
Assignee:
UNIV NAGASAKI
International Classes:
C25D7/00; B82B1/00; B82B3/00; C01B19/04; C25D1/00; C25D5/10; C25D5/50
Domestic Patent References:
| JPH06507143A | 1994-08-11 | |||
| JP2000080495A | 2000-03-21 | |||
| JP2005059125A | 2005-03-10 | |||
| JP2007152548A | 2007-06-21 | |||
| JP2008115469A | 2008-05-22 | |||
| JP2010515820A | 2010-05-13 |
Foreign References:
| US4581108A | 1986-04-08 |
Attorney, Agent or Firm:
Yamaguchi International Patent Office