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Title:
METHOD OF MANUFACTURING GROOVE GATE FIELD-EFFECT TRANSISTOR
Document Type and Number:
Japanese Patent JP2002353445
Kind Code:
A
Abstract:

To form a groove gate field-effect transistor, which can effectively suppress short-channel effect, in a shallow source-drain junction, with low resistance and in easy processes.

In a method of manufacturing a groove gate field-effect transistor 100A of a structure, having an impurity introduced layer 13, which is used as a source or a drain, is formed in a semiconductor substrate 1, by introducing impurities in the substrate 1; a groove 15 is bored in the layer 13, a gate insulating film 5 is formed on the bottom of the groove 15 and a gate G is formed, in such a way as to embed the groove 15, after the impurities are introduced in the substrate 1, and is subjected to laser annealing for activating the impurities prior to the gate G formation.


Inventors:
SUZUKI TOSHIHARU
Application Number:
JP2001161892A
Publication Date:
December 06, 2002
Filing Date:
May 30, 2001
Export Citation:
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Assignee:
SONY CORP
International Classes:
H01L21/265; H01L21/268; H01L21/336; H01L29/43; H01L29/423; H01L29/49; H01L29/78; (IPC1-7): H01L29/78; H01L29/43
Attorney, Agent or Firm:
Noboru Tajime (1 person outside)