Title:
高電子移動度トランジスタ及び高電子移動度トランジスタを製造する方法
Document Type and Number:
Japanese Patent JP6961086
Kind Code:
B2
Abstract:
A high electron mobility transistor (HEMT) includes a channel semiconductor structure including a stack of layers arranged on top of each other in an order of magnitudes of the polarization of materials of the layers to form multiple carrier channels at heterojunctions formed by each pair of layers in the stack. The stack of layers includes a first layer and a second layer. The magnitude of polarization of the first layer is greater than the magnitude of polarization of the second layer arranged in the stack below the first layer, and the width of the first layer is less than the width of the second layer to form a staircase profile of the semiconductor structure. The HEMT includes a source semiconductor structure including a heavily doped semiconductor material, a drain semiconductor structure including the heavily doped semiconductor material. The HEMT includes a source, a drain, and a gate electrodes to modulate the conductivity of the carrier channels. The gate electrode has a staircase shape having trends and risers tracking the staircase profile of the semiconductor structure.
Inventors:
Theo, Kuhn Fu
Chow Dolly, Nadim
Chow Dolly, Nadim
Application Number:
JP2020528357A
Publication Date:
November 05, 2021
Filing Date:
August 20, 2018
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H01L21/338; H01L29/778; H01L29/812
Domestic Patent References:
| JP2018511169A | ||||
| JP2017073525A |
Foreign References:
| US20160126340 |
Attorney, Agent or Firm:
Michiharu Soga
Kajinami order
Kazuhiro Oyaku
Shunichi Ueda
Junichiro Yoshida
Kajinami order
Kazuhiro Oyaku
Shunichi Ueda
Junichiro Yoshida
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