To provide a method for forming a flat inter-level dielectric layer of low k, which comprises an FSG layer of HDP-CVD which protects a conductive layer from fluorine.

A method is comprised where a conductive layer is deposited near a semiconductor substrate, and the conductive layer is formed multiple stages, in which a plurality of conductive lines comprising gap are formed. The conductive layer is a metal layer which comprises at least either aluminum or copper. An FSG layer is formed on the conductive layer which is patterned by a high density plasma CVD, filling the gap between conductor lines. Furthermore, a method is comprised where the FSG layer is chemically-mechanically polished, and an undoped oxide layer is deposited over the FSG layer. The peak of FSG layer, corresponding to the width of a conductive metal line, is reduced by a step of CMP. Thus, a following conductive layers that follow are protected from being exposed to fluorine due to the FSG layer.