Title:
METHOD OF MANUFACTURING MULTILAYER CIRCUIT BOARD
Document Type and Number:
Japanese Patent JP3838876
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer circuit board excellent in absorbing noise and capable of being miniaturized.
SOLUTION: The method of manufacturing the multilayer circuit board on which wiring patterns are formed in multilayer through insulation layers 28 and having capacitors comprises the steps of: forming positive electrode, oxide film 12 on the surface of the valve metal foil 10; forming an electrode film 14 on the oxide film 12; cutting out the valve metal foil 10 having the electrode film 14 into the prescribed size to form capacitor sheets 16; and assembling to electrically connect the capacitor sheets 16 to the wiring patterns.
Inventors:
Horikawa Taiai
Akio Rokukawa
Kazushige Imai
Myo Tan Wu
Akio Rokukawa
Kazushige Imai
Myo Tan Wu
Application Number:
JP2001001270A
Publication Date:
October 25, 2006
Filing Date:
January 09, 2001
Export Citation:
Assignee:
Shinko Electric Industry Co., Ltd.
International Classes:
H05K3/46; (IPC1-7): H05K3/46
Domestic Patent References:
| JP11298104A | ||||
| JP2000208942A | ||||
| JP10098245A |
Attorney, Agent or Firm:
Takao Watanuki
Horimai Kazuharu
Horimai Kazuharu
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