METHOD OF MANUFACTURING MULTILAYERED WIRING BOARD

Japanese Patent JP3720830

B2

PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayered wiring board capable of suppressing the generation of voids or disconnection of wiring and capable of manufacturing the multilayered wiring board excellent in smoothness.
SOLUTION: The method of manufacturing the multilayered wiring board comprises a process of forming a semiconductor circuit 22 on the surface of a transfer sheet 21, a process of forming a via hole 24 in a soft insulation layer 23 containing at least an organic resin and a conductor in the via hole 24, a process of transferring and embedding the conductor circuit 22 into the insulation layer 23 so as to allow the conductor and the conductor circuit 22 to be connected by laminating and pressing the conductor circuit 22 formed on the transfer sheet 21 to the insulation layer 23 comprising the conductor, and a process of peeling the transfer sheet 21 from the insulation layer 23 where the conductor 22 is transferred and embedded and a wiring layer 25 where the conductor circuit 22 is embedded on the surface of the insulation layer 23.

WO/2001/095682	METHOD AND DEVICE FOR DRYING MATERIALS AND METHOD OF PRODUCING CIRCUIT BOARDS USING THE SAME
JPS5671999	METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD
JP3949377	Interconnected assembly and manufacturing method for printed circuit boards

Kei Hayashi

JP2004123224A

November 30, 2005

April 19, 2004

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Kyocera Corporation

H05K3/40; H05K3/00; H05K3/20; H05K3/46; (IPC1-7): H05K3/46; H05K3/00; H05K3/20; H05K3/40

JP61210691A
JP7154073A
JP7307571A
JP497590A
JP56155587A

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