Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2002334927
Kind Code:
A
Abstract:
To improve reliability of semiconductor devices by reducing the charge-up damage to substrates, in a manufacturing process using plasma.
An insulation film 22 is formed on the reverse side of the substrate 11, prior to a process for forming a first wiring layer. In this way, charges generated on the substrate 11 are prevented from flowing to the ground potential through the substrate 11, even when a plasma CVD method, a sputter method or a dry etching method is used in the wiring forming process afterward, and damages to the substrate 11 due to the charge-up are prevented.
Inventors:
SAIKAWA KENJI
MAENO RYOHEI
OKUDAIRA SADAYUKI
SAITO TETSUO
TAMARU TAKESHI
OMORI KAZUTOSHI
MAENO RYOHEI
OKUDAIRA SADAYUKI
SAITO TETSUO
TAMARU TAKESHI
OMORI KAZUTOSHI
Application Number:
JP2001140822A
Publication Date:
November 22, 2002
Filing Date:
May 11, 2001
Export Citation:
Assignee:
HITACHI LTD
HITACHI TOKYO ELECTRONICS
HITACHI TOKYO ELECTRONICS
International Classes:
H01L23/522; H01L21/3213; H01L21/768; H01L21/8238; H01L27/08; H01L27/092; (IPC1-7): H01L21/768; H01L21/3213; H01L21/8238; H01L27/08; H01L27/092
Attorney, Agent or Firm:
Yamato Tsutsui