Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2004119529
Kind Code:
A
Abstract:

To form a contact hole which prevents a gate electrode and a source area or drain area from being short-circuited even if the misalignment of the contact hole occurs when a semiconductor device having a small interval between a semiconductor element and a contact hole is manufactured.

In addition to a process of forming an interlayer insulating film 6 after forming an element isolation insulating film 2, a gate electrode 3, a source or drain area 4, and a side wall insulating film 5 of the gate electrode 3 on a silicon substrate 1 and a conventional process of forming a contact hole 7; a process of forming an insulating film 10 on the side wall of the contact hole 7 is included to form the contact hole which can prevent the gate electrode 3 and source or drain area 4 from being short-circuited even when the contact hole 7 shifts in position.


Inventors:
EGASHIRA KYOKO
Application Number:
JP2002278253A
Publication Date:
April 15, 2004
Filing Date:
September 25, 2002
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H01L21/28; H01L21/336; H01L21/768; H01L23/522; H01L29/417; H01L29/78; (IPC1-7): H01L21/768; H01L21/28; H01L21/336; H01L29/417; H01L29/78
Attorney, Agent or Firm:
Yoshihiro Morimoto