METHOD FOR MANUFACTURING THIN FILM TRANSISTOR - nec LCD Technology Co., Ltd.

Title:

METHOD FOR MANUFACTURING THIN FILM TRANSISTOR

Document Type and Number:

Japanese Patent JP3890270

Kind Code:

B2

Abstract:

PROBLEM TO BE SOLVED: To reduce the variation of threshold voltages in p-type and n-type thin film transistors.
SOLUTION: Prior to the crystallization by laser, at least one kind of impurity is doped into at least the entire surface of a thin film semiconductor layer so that the ratio of Quasi-Fermi levels in the regions for forming each conductive type transistor therein is limited to 0.5-2.

More Like This:

JP3229938	DISPLAY DEVICE
WO/2017/067062	DUAL-GATE THIN-FILM TRANSISTOR, MANUFACTURING METHOD THEREFOR, AND ARRAY SUBSTRATE
JP6415713	GOA circuit based on low temperature polysilicon semiconductor thin film transistor

Inventors:

Takahashi Misa

Application Number:

JP2002211500A

Publication Date:

March 07, 2007

Filing Date:

July 19, 2002

Export Citation:

Click for automatic bibliography generation Help

Assignee:

nec LCD Technology Co., Ltd.

International Classes:

H01L29/786; C30B1/00; H01L21/20; H01L21/268; H01L21/336; H01L21/77; H01L21/84; H01L27/12; (IPC1-7): H01L29/786; H01L21/20; H01L21/336

Domestic Patent References:

JP2002107760A
JP11087731A
JP5166839A
JP6265936A
JP2001318626A
JP6196704A

Attorney, Agent or Firm:

Masahiko Desk
Masashi Kudo
Yasuhisa Tanizawa

Previous Patent: SUB WORD DRIVER CIRCUIT

Next Patent: IMAGE PROCESSOR, METHOD FOR ORDERING CONSUMABLES FOR IMAGE PROCESSOR, STORAGE MEDIUM AND PROGRAM