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Title:
METHOD OF MANUFACTURING WAFER JUNCTION, AND METHOD FOR MEASURING THICKNESS OF THE WAFER JUNCTION
Document Type and Number:
Japanese Patent JP2004022746
Kind Code:
A
Abstract:

To provide a method of accurately and easily adjusting the thickness of two jointed wafers, while polishing the upper layer wafer, measuring the thickness of the wafers using a nondestructive method, and classifying them according to the specifications.

A plurality of mask patterns, with each size for inspecting the thickness of a wafer, are formed on one surface of a silicon wafer, and V-shaped trenches 210, 220, and 230 of various depths, after chemical etching for a fixed time. The residual thickness of the upper layer wafer 1 is measured, depending on the size of an aperture 212 of the V-shaped trenches 210, 220, and 230 appearing as a result of further polishing. Moreover, the wafers are classified according to applied specifications and are presented as constituent components of a microsensor device, a silicon piezometer, and an accelerometer.


Inventors:
WANG HUNG-DAR
GONG SHIH-CHIN
HUANG RUEY-SHING
TSENG CHUNG-YANG
Application Number:
JP2002174598A
Publication Date:
January 22, 2004
Filing Date:
June 14, 2002
Export Citation:
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Assignee:
ASIA PACIFIC MICROSYSTEMS INC
International Classes:
B24B37/04; B24B49/03; B24B49/12; C23F1/02; H01L21/304; H01L23/544; G01B11/06; (IPC1-7): H01L21/304; B24B37/04; B24B49/03; B24B49/12; C23F1/02
Attorney, Agent or Firm:
Mikio Hatta
Atsushi Nogami
Yasuo Nara
Etsuko Saito
Katsuyuki Utani