Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
METHOD OF MANUFACTURING WIRING BOARD
Document Type and Number:
Japanese Patent JP2008041932
Kind Code:
A
Abstract:

To provide a method of manufacturing a wiring board that comprises an insulating layer formed of a resin in which an inorganic filler is densely filled, that allows conduction between wiring layers that are disposed on and under the insulating layer through via holes, and that allows the wiring layers to be electrically connected without any poor connection and decreased reliability caused by the presence of residues including the filler.

The method manufactures the wiring board in which a lower wiring layer, an insulating layer having an inorganic filler and resin, and an upper wiring layer are sequentially formed; and the ratio of the inorganic filler contained in the entire insulating layer is from 50 volume% to 90 volume%. The wiring board has a plurality of via holes formed to pass through the insulating layer, and to electrically connect between the upper and lower wiring layers. The via holes are formed by sandblast processing that uses an abrasive with a mean particle diameter of from 8 m to 16 m.


Inventors:
ASAHI NOBORU
HARA YOSHITAKE
NONAKA TOSHINAKA
Application Number:
JP2006214217A
Publication Date:
February 21, 2008
Filing Date:
August 07, 2006
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
TORAY INDUSTRIES
International Classes:
H05K3/00; H05K3/46