METHOD FOR PLANARIZING SEMICONDUCTOR DEVICE

Title:

METHOD FOR PLANARIZING SEMICONDUCTOR DEVICE

Document Type and Number:

Japanese Patent JP2002076003

Kind Code:

A

Abstract:

To provide a method for forming a topography extremely reduced on a semiconductor surface formed by a damascene process.

A diamond or diamond like carbon film is adhered to the surface of a substrate as a polishing stop layer before a metal level pattern is formed. Next, a protective film is adhered on the diamond or diamond like carbon polishing stop layer. The protective film can be used as another polishing stop layer. Both the diamond or diamond like carbon film and the protective film are used as a hard mask so that a pattern is formed in a trench that has metallic features. The protective film protects the diamond or diamond like carbon polishing stop layer during a pattern forming process. After a conductive metal layer is adhered, the substrate is polished, and redundant conducting materials and the topography are removed.

Inventors:

CLEVENGER LAWRENCE A
HSU LOUIS L C
STEPHENS JEREMY K
WISE MICHAEL

Application Number:

JP2001171139A

Publication Date:

March 15, 2002

Filing Date:

June 06, 2001

Export Citation:

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Assignee:

IBM

International Classes:

H01L21/76; H01L21/285; H01L21/304; H01L21/306; H01L21/308; H01L21/3105; H01L21/311; H01L21/3205; H01L21/321; H01L21/762; H01L21/768; (IPC1-7): H01L21/3205; H01L21/304; H01L21/306; H01L21/76; H01L21/762

Attorney, Agent or Firm:

Hiroshi Sakaguchi (2 outside)

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