Title:
METHOD OF REDUCING WARPAGE OF MOUNTING ELECTRONIC MOUNTING BOARD
Document Type and Number:
Japanese Patent JP3604348
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method of reducing warpage of a board for mounting electronic parts, which can reduce the warpage of the board for easily and effectively mounting electronic components, especially the warpages in the longitudinal direction.
SOLUTION: In this method of reducing the warpage of the board 10 for mounting electronic components which reduces the warpage of the board 10 for mounting electronic components possessing at least a wiring pattern at the surface of the insulation board, the warpage is removed continuously, while carrying the board 10 for mounting electronic components under the condition of the rear of the insulation board being brought into contact with a roll member 22 of 15 mm or smaller in radius of curvature and specified tension is given to it.
Inventors:
Hideichi Kawasaki
Masaya Sakaguchi
Masaya Sakaguchi
Application Number:
JP2001124355A
Publication Date:
December 22, 2004
Filing Date:
April 23, 2001
Export Citation:
Assignee:
Mitsui Mining & Smelting Co., Ltd.
International Classes:
H05K3/22; B29C53/18; H01L21/50; H01L21/60; (IPC1-7): H01L21/60; B29C53/18
Domestic Patent References:
| JP3244525A | ||||
| JP1258932A | ||||
| JP2000332063A |
Attorney, Agent or Firm:
Hiroyuki Kurihara
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