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Title:
半導体発光装置と成長基板の間の角部での分離層の除去方法
Document Type and Number:
Japanese Patent JP7437711
Kind Code:
B2
Abstract:
A method for fabricating semiconductor light emitting devices (LEDs) includes forming a plurality of light emitting diode (LED) structures having sidewall P-N junctions on a growth substrate, and forming an isolation layer on the light emitting diode (LED) structures having corners at intersections of the epitaxial structures with the growth substrate. The method also includes forming an etchable covering channel layer on the isolation layer, forming a patterning protection layer on the covering channel layer, forming etching channels in the covering channel layer using a first etching process, and removing the corners of the isolation layer by etching the isolation layer using a second etching process. Following the second etching process the isolation layer covers the sidewall P-N junctions. The method can also include bonding the growth substrate to a carrier and separating the growth substrate from the light emitting diode (LED) structures using a laser lift off (LLO) process.

Inventors:
Vermilion
▲ザン▼士凱
Shi Yifeng
Chung Tri Doan
David Chung Doan
Takanori Ogawa
Kazunori Kondo
Toshiyuki Kozai
Nobuaki Matsumoto
Taichi Kitagawa
Application Number:
JP2022057762A
Publication Date:
February 26, 2024
Filing Date:
March 31, 2022
Export Citation:
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Assignee:
SEMILEDS CORPORATION
International Classes:
H01L33/02
Domestic Patent References:
JP2007324586A
JP2011119383A
Attorney, Agent or Firm:
SK Patent Attorney Corporation
Akihiko Okuno
Hiroyuki Ito