Title:
METHOD AND STRUCTURE FOR PREVENTING CONTAMINATION CAUSED BY PARTICLE
Document Type and Number:
Japanese Patent JP3631997
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method and a structure for preventing the contamination caused by particles when a substrate such as a semiconductor wafer is stored or transported.
SOLUTION: A laminar flow boundary layer or a turbulent flow boundary layer is formed over the whole area on the surface of the semiconductor wafer W by making clean air flow along the surface of the wafer W arranged horizontally in the environment 38 having a prescribed cleanliness at a prescribed speed relative to the surface of the wafer W. The fluid in the laminar flow boundary layer or the turbulent flow boundary layer formed on the surface of the wafer W is regarded as a viscous fluid with respect to minute particles. Accordingly, even if the particles float in the environment where the wafer W is arranged and descend toward the wafer W, the descent of the particles is hindered by the layer of the viscous fluid so that the contamination caused by the particles can be prevented.
Inventors:
Yasuto Karasawa
Application Number:
JP2001394684A
Publication Date:
March 23, 2005
Filing Date:
December 26, 2001
Export Citation:
Assignee:
Clean Transport Matrix Co., Ltd.
International Classes:
B08B5/00; B08B17/02; B65G49/00; H01L21/304; H01L21/677; H01L21/68; (IPC1-7): B08B5/00; B08B17/02; B65G49/00; H01L21/304; H01L21/68
Domestic Patent References:
| JP2001338853A | ||||
| JP6044135U |
Attorney, Agent or Firm:
Yoshiki Hasegawa
Tatsuya Shioda
Shiro Terasaki
Tatsuya Shioda
Shiro Terasaki