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Title:
METHOD OF SUPERVISORY CONTROL
Document Type and Number:
Japanese Patent JP2003134696
Kind Code:
A
Abstract:

To provide a method for preventing abnormal control (erroneous control) at a slave station when erroneous control information is generated due to a defective part or a signal processing error at a master station.

When a master station 10 writes control information A in an output circuit 16, each bit of the information A is converted into an n-bit code at identical logic level or combinational logic level. Multiple information D produced by multiplexing n pieces of the control information A is written in the output circuit 16 and transmitted as information A to a slave station 12 from the output circuit 16. The slave station 12 decides whether or not the bit pattern of the received multiplex information D' matches any of a plurality of normal incoming patterns. Based on the decision, abnormal information D' is deleted and only normal information D' is given to a device for supervisory control (a breaker 14) by reproducing control output.


Inventors:
TSUNODA TAKANORI
TOKITSU YOSHIYUKI
Application Number:
JP2001330593A
Publication Date:
May 09, 2003
Filing Date:
October 29, 2001
Export Citation:
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Assignee:
NISSIN ELECTRIC CO LTD
International Classes:
H02J13/00; G05B9/03; G05B19/048; G05B19/05; G05B23/02; H04L12/40; H04Q9/00; (IPC1-7): H02J13/00; G05B9/03; G05B19/048; G05B19/05; G05B23/02; H04L12/40; H04Q9/00
Attorney, Agent or Firm:
Ryutaro Fujita