PURPOSE: To prevent the holding of synchronization due to the missing of a replay by a slave machine by delaying a replay transmitted from an input apparatus to a master machine in accordance with an input request signal outputted from a controller constituted of the master machine and the slave machine only by one clock as compared with the slave machine.

CONSTITUTION: The master machine 1 and the slave machine 2 are PCs having the same specifications and respectively include microprocessors and clock circuits for driving them in their insides. Signals 7, 8 are reading pulse signals outputted from respective PCs. In the case of inputting data, the signals 7, 8 are validated and then the validity of signals 11, 12 are checked to read out data. The check of the validity is executed synchronously with the internal clocks of respective PCs. After outputting the signals 7, 8, a synchronization circuit 4 outputs a reading signal 9 and then synchronizes with the timing of the signal 7. A delay circuit 5 delays a replay from the input apparatus 6 to the master machine PC 1 only by one clock period and outputs the replay to the slave machine PC 2 without delaying it.