PURPOSE: To obtain data transmission with less transmission delay by using one kind of block identification code and one kind of block code for the transmission of data.
CONSTITUTION: Input data are divided into the unit of 22 bytes at a pre-stage circuit, the data in 22-bytes are used for one packet data, an error check code addition section 10 adds a 14-bit error check code to the data and an error correction parity adding section 11 adds an error correction parity bits in 82 bits, a block identification code addition section 12 adds a 16-bit block identification code to a head of one-packet data in 272 bits finally to generate transmission data. In this case, the error check code is used for detecting an error of the packet data and the parity bit is used for correcting the error of packet data. Then transmission data of one frame one packet configuration are outputted repetitively to reduce the transmission delay and to attain immediate decoding.
KURODA TORU
ISOBE TADASHI
YAMADA TSUKASA
