Title:
METHOD AND SYSTEM FOR ENHANCED DRIVE IN PROGRAMMABLE GATE ARRAY
Document Type and Number:
Japanese Patent JP3477313
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To enhance drive ability without providing an internal buffer in a program gate array or increasing the size of an individual element.
SOLUTION: Plural logic cells 25 in a programmable gate array(PGA) are programmed, so as to generate a coupled output with an intensified current drive ability. Specifically, a first logic cell is programmed to be provided with a first output, and a second logic cell is programmed to be provided with a second output. The first output and the second output are connected in the PGA, and the coupled output with the current drive ability intensified by the first logic cell and the second logic cell is formed. The first and the second logic cells are programmed by the same logic functions and as a result, these operate in parallel.
Inventors:
Scott Whitney Gould
Application Number:
JP12143796A
Publication Date:
December 10, 2003
Filing Date:
May 16, 1996
Export Citation:
Assignee:
INTERNATIONAL BUSINESS MASCHINES CORPORATION
International Classes:
H03K19/173; H03K19/0175; H03K19/177; (IPC1-7): H03K19/173; H03K19/177
Domestic Patent References:
| JP6169252A | ||||
| JP6188315A |
Other References:
【文献】稲葉保、森口章成,七五調による電子回路技術定石集,日本,CQ出版株式会社,1991年 4月 1日,p.233
Attorney, Agent or Firm:
Hiroshi Sakaguchi (1 person outside)