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Patent Searching and Data


Title:
METHOD AND SYSTEM FOR PROCESSING LOGIC FUNCTION
Document Type and Number:
Japanese Patent JP2001005843
Kind Code:
A
Abstract:

To efficiently perform a logic check without executing useless processing concerning a conditional expression including comparative operation with a multibit variable as an object.

The comparatively operated result of multibits is defined as a logic variable, the logic variable is defined as external input and the entire logic function is converted to the internal structure of a network form. In that case, comparative operation information expressed therewith is correspondently held. Next, the relation of the logic variable is analyzed while using the comparative operation information and the network is corrected so as to be reflected therewith. Namely, the comparative operation information is grouped, the input space of operation in each group is divided into exclusive areas and the network is corrected so as to express the comparative operation while using the exclusive areas. Ordinary logic function processing is performed to the corrected network and the logic relation is checked.


Inventors:
TSUNODA TAEKO
Application Number:
JP17094799A
Publication Date:
January 12, 2001
Filing Date:
June 17, 1999
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F17/50; (IPC1-7): G06F17/50
Attorney, Agent or Firm:
Shunichiro Nagasawa (1 person outside)