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Patent Searching and Data


Title:
METHOD AND SYSTEM FOR WAFER INSPECTION
Document Type and Number:
Japanese Patent JP2011101004
Kind Code:
A
Abstract:

To qualitatively and/or quantitatively evaluate multiple patterning lithographic processing.

A method for evaluating a lithographic pattern that is obtained using multiple patterning lithographic processing according to a target design composed of a first design and at least a second design includes aligning the target design with the lithographic pattern. The method further includes identifying a stitching region in the lithographic pattern based on a region of overlap of the first design and the second design in the target design aligned with the lithographic pattern and determining for the identified stitching region in the lithographic pattern whether a predetermined criterion is fulfilled.


Inventors:
WIAUX VINCENT JEAN-MARIE PIERRE PAUL
MATSUOKA RYOICHI
KOSHIHARA SHUNSUKE
SAKAI HIDEO
Application Number:
JP2010242065A
Publication Date:
May 19, 2011
Filing Date:
October 28, 2010
Export Citation:
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Assignee:
IMEC
HITACHI HIGH TECH CORP
International Classes:
H01L21/027; G06T1/00
Domestic Patent References:
JP2010085138A2010-04-15
JP2011013022A2011-01-20
JP2010199462A2010-09-09
JP2006245584A2006-09-14
JP2009294308A2009-12-17
JP2009200499A2009-09-03
JP2008118033A2008-05-22
Foreign References:
US0010011A1853-09-13
Attorney, Agent or Firm:
Takuji Yamada
Mitsuo Tanaka
Mikio Takeuchi