Title:
METHOD FOR TESTING CONTROL MATRIX FOR FLAT PANEL DISPLAY
Document Type and Number:
Japanese Patent JPH04351972
Kind Code:
A
Abstract:
PURPOSE: To test a matrix of thin film transistor(TFT) used for an active matrix liquid crystal display panel by performing probe inspection for a slight number of terminals that can be accessed.
CONSTITUTION: An AC signal 26 which is in series with a variable DC power source 34 drives gate lines of an LCD display driving matrix and ammeters 28 and 32 monitor currents generated on drain lines. Consequently, measured admittance when the value of the DC power source output is made usable is compared with that when unusable to conduct a test about whether or not the matrix 10 has a defect.
Inventors:
HENRII PII HOORU
Application Number:
JP40913890A
Publication Date:
December 07, 1992
Filing Date:
December 28, 1990
Export Citation:
Assignee:
GENRAD INC
International Classes:
G01R31/316; G01R31/317; G01R31/00; G02F1/13; G09G3/00; (IPC1-7): G01R31/00; G01R31/318
Domestic Patent References:
JPH01144093A | 1989-06-06 | |||
JPH0246494A | 1990-02-15 |
Attorney, Agent or Firm:
Kaoru Furuya (2 outside)
Previous Patent: 油性毛髪化粧料組成物
Next Patent: DETECTION METHOD FOR FAILURE POINT IN UNDERGROUND ELECTRIC WIRE
Next Patent: DETECTION METHOD FOR FAILURE POINT IN UNDERGROUND ELECTRIC WIRE