Title:
METHOD FOR TESTING SEMICONDUCTOR CIRCUIT
Document Type and Number:
Japanese Patent JP2002303655
Kind Code:
A
Abstract:
To provide a method for testing a semiconductor circuit that can inexpensively and accurately perform test using a logic tester.
An analog circuit IC 3 is obtained by integrating the analog circuit section of an IC 1 to be measured into one IC. The logic tester 5 is connected to the IC 1 to be measured via the analog circuit IC 3. A logic signal for testing is outputted from a logic tester 5 to the analog circuit IC 3. A logic signal inputted to the analog circuit IC 3 is converted to an analog signal and is outputted toward an IC 2 to be measured.
Inventors:
MORIHIRA HIROSHI
Application Number:
JP2001107944A
Publication Date:
October 18, 2002
Filing Date:
April 06, 2001
Export Citation:
Assignee:
SEIKO EPSON CORP
International Classes:
G01R31/316; (IPC1-7): G01R31/316
Attorney, Agent or Firm:
Masanori Ueyanagi (1 outside)
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