Title:
METHOD FOR VERIFYING COOPERATION BETWEEN HARDWARE AND SOFTWARE
Document Type and Number:
Japanese Patent JP2000011022
Kind Code:
A
Abstract:
To provide a hardware/software cooperation verifying method capable of executing quick and accurate simulation in the simulation of the whole system in which a software program code and hardware can interact with each other.
The system is provided with plural processor simulation models 103 for simulating software instruction operation, a logical circuit simulation model 105 for simulating a logical circuit part, a model switching means 102 for dynamically switching plural processor simulation models 103, and a synchronizing means 104 for synchronizing the simulation of the processor simulation models 103 with that of the logical circuit simulation model 105.
Inventors:
MAE YOICHIRO
Application Number:
JP17461198A
Publication Date:
January 14, 2000
Filing Date:
June 22, 1998
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F11/26; G06F17/50; (IPC1-7): G06F17/50; G06F11/26
Attorney, Agent or Firm:
Miyai Akio
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