Title:
デジタル入力信号のワード長を低減する方法及び装置並びにデジタル入力信号を回復させる方法及び装置
Document Type and Number:
Japanese Patent JP2004507191
Kind Code:
A
Abstract:
A method and signal processing apparatus for reducing the number of bits of a digital input signal (Mi), includes adding a pseudo-random noise signal (Na) to the digital input signal (Mi) to obtain an intermediate signal (Di), the pseudo-random noise signal (Na) being defined by noise parameters (Np), and quantizing the intermediate signal (Di), having a word length of n bits, to a reduced word-length signal (Me) having a word length of m bits, n being larger than or equal to m. The method further includes quantizing the intermediate signal (Di) using a first transfer function which is non-linear, the first transfer function being defined by non-linear device parameters (NLDp).
Inventors:
Artz Ronaldas M
Application Number:
JP2002521296A
Publication Date:
March 04, 2004
Filing Date:
August 15, 2001
Export Citation:
Assignee:
Koninklijke Philips Electronics N.V.
International Classes:
G11B20/10; H03M7/14; H03M7/30; H04B14/04; H04N5/91; H04N5/92; H04N7/26; (IPC1-7): H03M7/14; G11B20/10; H04N5/91; H04N5/92
Domestic Patent References:
| JPH10224803A | 1998-08-21 | |||
| JPH0897727A | 1996-04-12 |
Foreign References:
| US5946652A | 1999-08-31 |
Attorney, Agent or Firm:
Susumu Tsugaru
Akihiko Miyazaki
Hiroyoshi Aoki
Akihiko Miyazaki
Hiroyoshi Aoki