Title:
METHODS AND SYSTEMS FOR SIGNAL STATUS ANALYSIS
Document Type and Number:
Japanese Patent JP2014098698
Kind Code:
A
Abstract:
To navigate a user of a test system in order to analyze a bus.
A user is navigated through information related to the status of one or more layers of a signal, such as a serial or parallel bus. Information may be displayed by selecting fields within a visual depicted on a measuring instrument. By selecting particular fields and indicators, different aspects of a layer may be analyzed without the need to have extensive knowledge of the operation of the measuring instrument.
Inventors:
RULE KEITH D
WALTER R STRAND
KEITH A OLSON
MICHAEL J WADZITA
STEVE M MISHLER
WALTER R STRAND
KEITH A OLSON
MICHAEL J WADZITA
STEVE M MISHLER
Application Number:
JP2013234689A
Publication Date:
May 29, 2014
Filing Date:
November 13, 2013
Export Citation:
Assignee:
TEKTRONIX INC
International Classes:
G01R13/20
Domestic Patent References:
| JP2007522453A | 2007-08-09 | |||
| JP2002358249A | 2002-12-13 | |||
| JP2005050093A | 2005-02-24 | |||
| JP2002198978A | 2002-07-12 | |||
| JP2005000409A | 2005-01-06 | |||
| JP2012050069A | 2012-03-08 | |||
| JP2011232215A | 2011-11-17 |
Foreign References:
| US20060123350A1 | 2006-06-08 | |||
| EP1562131A2 | 2005-08-10 | |||
| EP1486165A1 | 2004-12-15 | |||
| US20100063760A1 | 2010-03-11 |
Attorney, Agent or Firm:
Yamaguchi International Patent Office