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Patent Searching and Data


Title:
MICROCOMPUTER DEVELOPMENT SUPPORTING DEVICE
Document Type and Number:
Japanese Patent JPH04111023
Kind Code:
A
Abstract:

PURPOSE: To execute the high speed operation having a real time property and to eliminate the limit of a function of an internal circuit by switching mutually operations of two microcomputers having an input terminal for controlling an output signal to a high impedance state.

CONSTITUTION: The device is provided with two microcomputers 103, 104 having an input terminal for controlling an output signal to a high impedance state, and an arbitrating circuit 105, and constituted so as to switch mutually operations of two microcomputers 103, 104. That is, by controlling this bus freeze request terminal by the internal arbitrating circuit 105, the microcomputers 103, 104 are detached from an internal bus to which the microcomputers 103, 104 are connected and a state that they are connected as they are is maintained. In such a way, a high speed operation having a real time property is executed, a limit of a function of the internal circuit is eliminated and all are offered.


Inventors:
TSUZUKI KAZUTO
Application Number:
JP22926290A
Publication Date:
April 13, 1992
Filing Date:
August 30, 1990
Export Citation:
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Assignee:
NIPPON ELECTRIC IC MICROCOMPUT
International Classes:
G06F11/22; G06F15/78; G01R31/28; (IPC1-7): G01R31/28; G06F11/22; G06F15/78
Domestic Patent References:
JPS62205444A1987-09-10
JPS5995654A1984-06-01
JPS6379143A1988-04-09
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)