Title:
MICROCOMPUTER
Document Type and Number:
Japanese Patent JPH09231191
Kind Code:
A
Abstract:
To provide a microcomuter for which measures against a program hang-up are simplified.
A CPU 11 has a program counter 111, an instruction decoder 112, etc., and has an internal reset instruction for initializing the system as one execution instruction. The instruction decoder 112 decodes the read-in internal rest instruction and outputs an internal reset signal for resetting the system. A program memory 12 has a memory area composed of a program area 121 and a free area 122. The program area 121 is a memory area wherein programs needed to structure the system are actually stored and the free area 122 is an area outside the program area 121 and stores internal reset instruction in all the addresses.
Inventors:
IZUMI FUMIHIRO
Application Number:
JP4139496A
Publication Date:
September 05, 1997
Filing Date:
February 28, 1996
Export Citation:
Assignee:
NEC CORP
International Classes:
G06F1/24; G06F15/78; (IPC1-7): G06F15/78; G06F1/24
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)
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