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Patent Searching and Data


Title:
MICROINSTRUCTION CONTROLLING SYSTEM
Document Type and Number:
Japanese Patent JPS5725041
Kind Code:
A
Abstract:

PURPOSE: To solve a problem of a time lag in case of an address transfer and a data transfer, by providing a read-out data register for execution, on a microinstruction executing device located at a remote position from a control memory device for storing a microinstruction.

CONSTITUTION: A control memory device 1 in a control memory unit 20 is accessed by an address of an address register 4, reads out a data, and sets it to a read-out data register 2. The register 2 transfers information to an address generation controlling circuit 3, and a microinstruction executing unit 21 located at a remote position. In case of an unconditional branch, the circuit 3 sets the next branch address to the register 4. A data which has been transferred to the unit 21 is set to a data register 12 for executing a microinstruction, after a prescribed machine cycle, and also its contents are supplied to a microinstruction executing logic 15 and are executed. In case of a conditional branch, the branch condition is sent to the circuit 3 by the unit 21. The circuit 3 corrects the branch address, generates the next branch address, and the registers 4, 2 stop updating by a prescribed machine cycle.


Inventors:
NOMOTO SHINSUKE
Application Number:
JP9995180A
Publication Date:
February 09, 1982
Filing Date:
July 23, 1980
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G06F9/22; G06F9/26; G06F9/28; G06F9/38; (IPC1-7): G06F9/22; G06F9/28; G06F9/38