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Title:
MICROPROCESSOR DEVICE
Document Type and Number:
Japanese Patent JPS63174157
Kind Code:
A
Abstract:

PURPOSE: To selectively switch to the reciprocal two forms of the byte of data to be accessed at the time of accessing a memory by selectively switching and connecting a first and a second circuits between an internal and an external data buses.

CONSTITUTION: A microprocessor (MPU) is constituted of 16 data buses of 16 bits and the data of the 16 bits is accessed for every access between the microprocessor and the memory 6. A first buffer circuit 1 is disposed between the internal data bus in the MPU and the external data bus and the data of the 16 bits is directly transferred to the memory 6 through the circuit 1. The second circuit is constituted of a byte swapper circuit 2 and a buffer circuit 3 and the byte array of the data of the 16 bits is inverted and the data is transferred to the memory 6. An instruction fed from the internal part of the MPU is decoded in a decoder 4 one of the circuits 1 or 3 is selectively turned on according to the contents of the instruction by a selection circuit 5.


Inventors:
FUJISAKI KIMINOBU
YAMAUCHI MITSURU
MOTOKI KIYOSHI
Application Number:
JP488287A
Publication Date:
July 18, 1988
Filing Date:
January 14, 1987
Export Citation:
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Assignee:
FUJITSU LTD
FUJITSU MICOM SYSTEMS
International Classes:
G06F13/36; G06F13/40; G06F15/78; (IPC1-7): G06F13/36; G06F13/40; G06F15/06
Domestic Patent References:
JPS61148562A1986-07-07
Attorney, Agent or Firm:
Aoki Akira (3 outside)



 
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