PURPOSE: To obtain a processor suitable for an application to repeat several times of fast sampling of servo information by performing the A/D conversion of the output of plural sample-and-hold circuits by switching sequentially.

CONSTITUTION: An input switching circuit 4 selects the output of the sample-and- hold circuit (S&H) circuit 1 when it completes sampling, and next, output is switched to that of S&H circuit 2 when the S&H circuit 2 completes the sam pling and the conversion result of the circuit 1 is stored in a conversion result holding register 6, and the other S&H circuits are operated similarly. Analog input A4 is selected when the result of the S&H circuit 3 is registered on a register 8, and such state is continued until the circuit 1 completes the sampling again. Thereby, fast A/D conversion can be performed by setting programmable delay circuits 12-14 appropriately when a cycle period is longer than a time required for four times of A/D conversion.