Title:
MICROPROCESSOR AND MOBILE COMMUNICATION TERMINAL
Document Type and Number:
Japanese Patent JP2004297632
Kind Code:
A
Abstract:
To synchronize a moving image and a voice when performing moving image processing and voice processing in different processors.
In a microprocessor (18) that is used being paired with a baseband processor (14) for performing baseband processing, the microprocessor is provided with a central processing unit (CPU) (183) for arithmetic processing, a counter (184) to make the time measuring possible in the arithmetic processing in the CPU, and an interface circuit (187) for making the counter readable from the baseband processor, and the baseband processor reads the counter to synchronize the processing in the baseband processor with the processing in the CPU of the microprocessor.
Inventors:
NAKAGAWA TETSUYA
ISHIDA KATSUHIKO
NAITO AKIRA
ISHIDA KATSUHIKO
NAITO AKIRA
Application Number:
JP2003089526A
Publication Date:
October 21, 2004
Filing Date:
March 28, 2003
Export Citation:
Assignee:
RENESAS TECH CORP
International Classes:
H04B7/26; H04M11/00; H04N7/14; H04W4/00; H04M1/725; H04W56/00; H04W88/02; (IPC1-7): H04M11/00; H04B7/26; H04M1/725
Attorney, Agent or Firm:
Shizuyo Tamamura
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