PURPOSE: To reduce a hardware by providing a clock control circuit that changes the period of a clock supplied to a microprocessor to a value set beforehand according to a memory selected by an address signal outputted from the microprocessor and the access time of peripheral circuits.

CONSTITUTION: A clock control circuit 10 is connected to a microprocessor 2A by a clock line 5. A memory 3A and a peripheral circuit 4A are connected to an address bus 6 and a data bus 6 from the microprocessor 2A. Further, the address bus 6 is connected to the clock control circuit 10 by an address line 9. Address signals outputted from the microprocessor 2A are inputted also to the clock control circuit 10 through the address line 9, and the clock outputted from the clock control circuit 10 is supplied to the microprocessor 2A through the clock line 5.