Title:
マイクロプロセッサ
Document Type and Number:
Japanese Patent JP5059508
Kind Code:
B2
Abstract:
A filter operation circuit of a microprocessor executes an IIR filter operation by using data provided from registers R0 to R2 and outputs one sample of data Y[n] subjected to filter operation and transfer data P[n] to be used in the next IIR filter operation. Register R0 provides filter coefficients to the filter operation circuit. Register R1 provides past transfer data P[n−1] and P[n−2] to the filter operation circuit and is overwritten and updated with new transfer data P[n] output from the filter operation circuit. Register R2 holds multiple samples of data X[n] to X[n+3] to be subjected to filter operation and provides X[n] to the filter operation circuit. An area of register R2 in which X[n] has been held is overwritten and updated with Y[n].
Inventors:
Hideki Matsuyama
Masayuki Daito
Masayuki Daito
Application Number:
JP2007194036A
Publication Date:
October 24, 2012
Filing Date:
July 26, 2007
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H03H17/02; G06F17/10; H03H17/04
Attorney, Agent or Firm:
Ken Ieiri