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Patent Searching and Data


Title:
MICROPROCESSOR
Document Type and Number:
Japanese Patent JPH02252047
Kind Code:
A
Abstract:

PURPOSE: To make software development efficient and to improve the throughput of a CPU by controlling the interval of accesses to a peripheral circuit by a circuit in a CPU.

CONSTITUTION: An arithmetic execution unit 101 inputs a program or the like through buses 113, 114 and executes the program. A determination unit 103 checks the value of a counter 104 by a counter signal 108 in accordance with a bus cycle request signal 109. The counter 104 controls the interval of accesses to the peripheral device for slow operation. An initial value is transferred from a register 105 to the counter 104 in accordance with a control signal 107. When the value of the counter 104 is not '0', execution program are read in through buses 113, 111, 112. The programs are successively stored in a prefetch queue 106 and read out to the unit 101 through a bus 114.


Inventors:
AMAKO SHUICHI
Application Number:
JP7257489A
Publication Date:
October 09, 1990
Filing Date:
March 24, 1989
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F13/42; (IPC1-7): G06F13/42
Attorney, Agent or Firm:
Uchihara Shin