Title:
MICROPROGRAM CONTROL MEMORY
Document Type and Number:
Japanese Patent JPS5785146
Kind Code:
A
Abstract:
A banked control store for conditional branching comprises: an address multiplexer (22) for receiving original instructions, branch instructions, and increment instructions for controlling the selection of an output of said address multiplexer; a control store address register (24) receiving the output of the address multiplexer; a single microinstruction memory (92) for receiving the output from the control store address register and for producing a memory output; a multiple microinstruction memory (96) for receiving the output from the control store address register; a memory select network (94) for receiving the output of the single microinstruction memory and said multiple microinstruction memory and having an output consisting of a selected memory output; an output register (36) for said memory select network; a single microinstruction flip-flop (26) for controlling the memory select network, the single microinstruction flip-flop receiving an output from the address multiplexer (22); a branch logic network (54) for producing a control output which is provided to the address multiplexer; and microcode branch condition register (56) for providing branch condition inputs to branch logic network.
Inventors:
TOOMASU ARAN REEN
Application Number:
JP13986581A
Publication Date:
May 27, 1982
Filing Date:
September 07, 1981
Export Citation:
Assignee:
CONTROL DATA CORP
International Classes:
G06F9/26; G06F9/28; G06F9/32; G06F9/22; G06F9/38; (IPC1-7): G06F9/24; G06F9/28