PURPOSE: To improve the performance of a microprogram controller by providing a flag to identify the executing order of instructions read out simultaneously just with a single access of a control memory and saving the memory address and the flag when the state of instruction is transited to restart the original processing when the processing is through the transition destination.

CONSTITUTION: The executing cycles of plural microinstructions are read out with an access given to a control memory 2 from a CS address production control circuit 1. A flag 4 is set for identification of those read cycles and a steal control circuit 5 controls the interruption requests given from outside or other units. In addition, the information on a CS address and the flag 4 are saved held by a saving register 6 when a steal request is received. While a state control part 7 recognizes the executing states of plural instructions read out at a time. Receiving a return command from a decoding circuit 3, the part 7 produces a dummy signal which invalidates the execution of microinstructions when no coincidence is obtained with the executing cycle flag held by the register 6.