Title:
CARRIER WAVE REPRODUCING CIRCUIT
Document Type and Number:
Japanese Patent JP3185725
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To maintain an effective AFC function even in the case of a high multilevel PSK modulating system by detecting the frequency offset direction of an input signal from the output signal of synchronizing detection and position information at the respective signal points of 1st and 2nd delay signals.
SOLUTION: This circuit has a frequency error detection circuit 19, with which the outputs of analog/digital(A/D) converters 6 and 7 are inputted and a frequency error is detected and outputted to an N sample integration circuit 16, and 2-multiplication circuit 20 for inputting the output of a CLK reproducing circuit 18 and outputting the double frequency of a reproduced clock to the A/D converters 6 and 7 as a sampling clock. That frequency error detection circuit 19 is composed of a 1st delay circuit 21, 2nd delay circuit 22 and computing element 23. Based on the output signal of synchronizing detection and the position information at the respective signal points of the 1st delay signal delaying that output signal for one-symbol time and the 2nd delay signal delaying the output signal within one-symbol time, the frequency offset direction of the input signal is detected.
Inventors:
Mutsumi Anzai
Application Number:
JP26258197A
Publication Date:
July 11, 2001
Filing Date:
September 29, 1997
Export Citation:
Assignee:
NEC
International Classes:
H04L27/227; H04L7/00; (IPC1-7): H04L27/227; H04L7/00
Domestic Patent References:
| JP787145A | ||||
| JP779270A | ||||
| JP7115447A | ||||
| JP11187076A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)