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Title:
MIMO DETECTION SYSTEM
Document Type and Number:
Japanese Patent JP2007300586
Kind Code:
A
Abstract:

To provide a detection system in which computational complexity can be remarkably reduced while maintaining bit error rate characteristics nearly equal with maximum likelihood detection in MIMO signal detection.

A metric generating circuit 31 corresponding to a metric generating means generates a metric corresponding to a transmission signal candidate on the basis of a reception signal inputted through terminals 29-1 to 29-4, channel information of a transmission line inputted from a terminal 30, and the transmission signal candidate outputted by a signal candidate generating circuit 44. A minimum metric detector 32 corresponding to a minimum metric detecting means inputs the metric and transmission signal candidate to search for a minimum metric, determines a bit of the transmission signal candidate corresponding to the minimum value and outputs the bit to a terminal 33 as a determination value. The transmission signal candidate generating circuit 44 corresponding to a transmission signal candidate generating means adds generation noise generated by a noise generating circuit 38 to the reception signal, performs linear synthesis using a weight coefficient determined from the channel information by a linear conversion circuit 35, then performs hard decision that is a sort of quantization, and generates the transmission signal candidate.

COPYRIGHT: (C)2008,JPO&INPIT


Inventors:
FUKAWA KAZUHIKO
SUZUKI HIROSHI
SUYAMA SATOSHI
Application Number:
JP2006152638A
Publication Date:
November 15, 2007
Filing Date:
May 01, 2006
Export Citation:
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Assignee:
TOKYO INST TECH
International Classes:
H04J99/00; H04B7/04; H04B7/08; H04J11/00
Domestic Patent References:
JP2001160772A2001-06-12
JP2006081131A2006-03-23
JP2005217506A2005-08-11
JP2005175544A2005-06-30
JP2005175541A2005-06-30
Foreign References:
WO2005055483A12005-06-16