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Patent Searching and Data


Title:
MISWRITING PREVENTING DEVICE
Document Type and Number:
Japanese Patent JPH0895865
Kind Code:
A
Abstract:

PURPOSE: To prevent a memory from being miswritten owing to a-noise, etc.

CONSTITUTION: When an address from a CPU 1 indicates a specific value, the memory 2 is allowed to be written and only in this writing-enabled state, the memory 2 is written. The specific value is a free address value which is not present in the address space of the memory 2. Consequently, miswriting is prevented through two steps, i.e., a 1st step wherein a write-enable register 4 is set according to the result obtained by decoding the address value by a decoder and a 2nd step wherein the memory 2 is allowed to be written with the output of an AND circuit 5, so the writing-enabled state is not easily entered and miswriting due to noise, etc., is seldom caused.


Inventors:
TANAKA HIROMASA
Application Number:
JP22933794A
Publication Date:
April 12, 1996
Filing Date:
September 26, 1994
Export Citation:
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Assignee:
NIPPON ELECTRIC ENG
International Classes:
G06F12/14; G06F21/60; G06F21/62; G06F21/79; (IPC1-7): G06F12/14
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)