Title:
MIXER CIRCUIT
Document Type and Number:
Japanese Patent JP2013223118
Kind Code:
A
Abstract:
To provide a mixer circuit that implements a high conversion gain and a low power consumption.
A mixer circuit 2 includes, in a series connection between a line of supply voltage VCC and a line of ground voltage VSS: a transconductance section 5 for converting high frequency voltage signals VRF, /VRF to high frequency current signals IRF, /IRF; a PPF 10 for converting the signals IRF, /IRF to complex current signals Q+1, Q-1, I+1, I-1; a frequency conversion section 20 for mixing the signals Q+1, Q-1, I+1, I-1 with local oscillator signals LO, /LO to generate complex current signals Q+, Q-, I+, I-; and a load section 30 for converting the signals Q+, Q-, I+, I- to complex voltage signals Q, /Q, I, /I.
Inventors:
TSUTSUMI TSUNEJI
TANIGUCHI EIJI
TANIGUCHI EIJI
Application Number:
JP2012093833A
Publication Date:
October 28, 2013
Filing Date:
April 17, 2012
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
H03D7/00; H03D7/14
Attorney, Agent or Firm:
Fukami patent office