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Patent Searching and Data


Title:
MMIC LOW NOISE AMPLIFIER
Document Type and Number:
Japanese Patent JPH11340747
Kind Code:
A
Abstract:

To provide an MMIC low noise amplifier capable of reducing a component cost and an assembly cost.

A circuit in which the gate terminal of an FET 1 is grounded through a feedback resistor 8 and a resistor 11 for gate grounding serially connected to it, a drain terminal is grounded through the connection point of the feedback resistor 8 and the resistor 11 for gate grounding and a first capacitor 10 for output matching, the connection point and a signal output terminal are connected through a second capacitor 12 for output matching and a source terminal is grounded through a self bias circuit is monolithically formed. Then, a signal input terminal 4 and the gate terminal of the FET 1 are connected through an input matching circuit 14 and the drain voltage of the FET 1 is supplied through an external inductor 9.


Inventors:
KIMIJIMA MASAYUKI
Application Number:
JP14877398A
Publication Date:
December 10, 1999
Filing Date:
May 29, 1998
Export Citation:
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Assignee:
NEW JAPAN RADIO CO LTD
International Classes:
H03F3/189; (IPC1-7): H03F3/189