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Title:
モジュール付きパッチパネル
Document Type and Number:
Japanese Patent JP4938647
Kind Code:
B2
Abstract:
A patch panel includes a back plane having front mounted pairs of termination locations, and an interconnect location electrically connected to each pair of termination locations. The termination locations connect to two patch cords. The interconnect location defines an access device for selectively accessing the termination locations. An interconnect module interfaces with the interconnect location. The module can include test access, power over Ethernet, or circuit protection features.

Inventors:
Coffey, Joseph Christopher
Schmidt, John Dee.
Ogren, Bruce Sea.
Peterson, Karl Jay.
Application Number:
JP2007506184A
Publication Date:
May 23, 2012
Filing Date:
March 02, 2005
Export Citation:
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Assignee:
ADC Telecommunications, Incorporated
International Classes:
H01R12/50; H04Q1/14; H04B1/03; H05K1/14
Domestic Patent References:
JPH10302918A1998-11-13
JPH0993632A1997-04-04
Foreign References:
WO2002060015A12002-08-01
US5903829A1999-05-11
Attorney, Agent or Firm:
Atsushi Aoki
Jun Tsuruta
Tetsuro Shimada
Kurachi Yasuyuki
Shimichi Akihisa



 
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