Title:
MODULATOR AND DEMODULATOR
Document Type and Number:
Japanese Patent JP2021141480
Kind Code:
A
Abstract:
To provide a modulator and a demodulator capable of easily enabling mapping and demapping for combination of various kinds of series, solely by combination of hardware without using a unique mapping table or demapping table.SOLUTION: A modulator includes: an upper bit coding part 12 for performing error correction coding for an upper bit; an upper bit modulation part 13 for performing orthogonal phase amplitude modulation for an error correction coded signal output from the upper bit coding part 12; a lower bit coding part 14 for performing error correction coding for lower bit; a lower bit modulation part 15 for performing orthogonal phase amplitude modulation for an error correction coded signal output from the lower bit coding part 14; a level adjustment part 16 for reducing power of the orthogonal phase amplitude modulated signal output form the lower bit modulation part 15; and an adder 17 for allocating a power reduced signal output from the level adjustment part 16 onto a signal domain identified by the orthogonal phase amplitude modulation with the upper bit modulation part 13.SELECTED DRAWING: Figure 1
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Inventors:
KATO MASAAKI
TANAKA YASUHIDE
TANAKA YASUHIDE
Application Number:
JP2020038629A
Publication Date:
September 16, 2021
Filing Date:
March 06, 2020
Export Citation:
Assignee:
JAPAN RADIO CO LTD
International Classes:
H04L27/00; H03M13/35; H04L1/00
Attorney, Agent or Firm:
Harushima Shigetokiro
Kazuhiko Sato
Kazuhiko Sato