Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
MOS OUTPUT CIRCUIT
Document Type and Number:
Japanese Patent JPH05175444
Kind Code:
A
Abstract:

PURPOSE: To have the output ON resistance value of a MOS output circuit variable.

CONSTITUTION: The ratios (W/L) of the channel widths W and the channel lengths (L) of P-type channel output transistors P0-P3 and N-type channel transistors N1-N3 are so selected as to be P0(N0):P1(N1):P2(N2):P3(N3):1:2:4:8. Logic gates 12 are arbitrarily selected by 4-bit control signals applied to respective control terminals a0-a3 and b0-b3. An input signal is inputted to the gates of the output transistors Pn and Nn through the selected logic gates 12. With this process, the output ON resistance value of an output circuit is determined. As the rise characteristics tr and the fall characteristics tf of the output circuit are proportional to the output ON resistance value, they can be arbitrarily change by selecting the control signals properly. 24=16 different tf and tr values can be obtained respectively.


Inventors:
OSAWA NOBUHIKO
Application Number:
JP34507891A
Publication Date:
July 13, 1993
Filing Date:
December 26, 1991
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SONY CORP
International Classes:
H01L21/8238; H01L27/092; H03K17/12; H04N5/335; H04N5/341; H04N5/372; (IPC1-7): H01L27/092; H03K17/12; H04N5/335
Attorney, Agent or Firm:
Kunio Yamaguchi (1 person outside)



 
Previous Patent: JPS5175443

Next Patent: イオノマー膜