PURPOSE: To realize a RAM requiring but a small standby current by a method wherein a first and second high-resistance wirings to serve as loads are constructed of an amorphous silicon film so that resistance is kept high even in the presence of a reduced memory cell area attributable to an enhanced integration.

CONSTITUTION: The drains 50a and 50b of inverter transistors T1a and T1b are connected to a power source through the intermediary of high resistance wirings 17b and 17a built of an amorphous silicon film and low-resistance wirings 100b and 100a built of a polycrystalline silicon film, with the high- resistance wirings 17a and 17b to serve as loads on a memory cell. Gate electrodes 4a and 4b are connected to the drains 50b and 50a through the intermediary of low-resistance wirings 80a and 80b built of a polycrystalline silicon film. In such a design, a high-resistance wiring may be obtained without adversely affecting other characteristics even in the absence of a sufficient resistance length consequential upon a reduced memory cell area, which results in a RAM capable of operation on a small standby current.