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Title:
MOSFET ON THE BASIS OF GALLIUM ARSENIC AND ITS PRODUCT
Document Type and Number:
Japanese Patent JPH10242465
Kind Code:
A
Abstract:

To form the alloy of an ohmic metal contact by allowing a gate oxide layer of a product including a metal/oxide/semiconductor field effect transistor on the basis of a first GaAs where a gate metal contact is arranged on a gate oxide layer as a base to be Gd-Ga oxide with a specific Gd:Ga atom ratio.

A protection dielectric layer is formed by depositing SiO2. The formation of an alloy of an ohmic metal is performed at a temperature within a range of, for example, 400±50°C in He atmosphere in a typical case. The elimination of the protection dielectric requires strictness for preventing the gate oxide from being damaged. More specifically, the composition of the gate oxide is selected properly, namely a Gd-Ga oxide with a Gd-Ga ratio that is 1:7.5 or preferably 1:4 or 1:2 or larger. The etching speed of Gd-Ga oxide in an HF solution depends on the Gd content of the oxide. Therefore, the protection dielectric on the gate oxide can be eliminated without losing the gate oxide and the alloy of the ohmic metal contact can be formed.


Inventors:
CHO ALFRED Y
HONG MINGHWEI
JAMES ROBERT ROSHIAN
MANNAERTS JOSEPH P
REN FAN
Application Number:
JP4168598A
Publication Date:
September 11, 1998
Filing Date:
February 24, 1998
Export Citation:
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Assignee:
LUCENT TECHNOLOGIES INC
International Classes:
B82B1/00; H01L21/28; H01L21/336; H01L21/8234; H01L29/78; H01L27/088; H01L29/51; (IPC1-7): H01L29/78; H01L21/8234; H01L27/088
Attorney, Agent or Firm:
Masao Okabe (11 others)