To provide a motor control circuit which can operate a motor continuously even upon failure of a CPU or a switching element.

A motor 11 is provided with a brush 12 for low speed driving, and a brush 13 for high speed driving disposed at a position of lead angle from the low speed brush 12. A circuit 14 for supplying power to the low speed brush 12 is provided with an FET 19 which performs switching control when the high speed brush 13 is used. A circuit 15 for supplying power to the high speed brush 13 is provided with an FET 20 which performs switching control when the low speed brush 12 is used. Furthermore, a short circuit 21 connecting the high and low speed brushes 12, 13 with the GND 16 is provided in parallel with the FETs 19 and 20. The short circuit 21 forms a motor drive circuit even upon failure of the FET 19, 20 to provide a fail-safe function thus sustaining motor driving.