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Title:
MOUNTING STRUCTURE FOR SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2010073771
Kind Code:
A
Abstract:

To make a mounting area small and to reduce total thickness even when a plurality of semiconductor structures called CSP (Chip Size Package) are mounted on a circuit board.

A first semiconductor structure 11a is embedded faceup in a recessed portion 2 formed on a top-surface side of a circuit board 1, and second and third semiconductor structures 11b and 11c are mounted facedown above the first semiconductor structure 11a and circuit board 1. Consequently, the first semiconductor structure 11a, and second and third semiconductor structures 11b and 11c overlap with each other partially to reduce the mounting area. Further, the first semiconductor structure 11a is embedded in the recessed portion 2 of the circuit board 1, so that the total thickness can be reduced.


Inventors:
ARAI KAZUYOSHI
Application Number:
JP2008237515A
Publication Date:
April 02, 2010
Filing Date:
September 17, 2008
Export Citation:
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Assignee:
CASIO COMPUTER CO LTD
International Classes:
H01L25/10; H01L23/12; H01L25/11; H01L25/18
Domestic Patent References:
JP2006108150A2006-04-20
JP2008187049A2008-08-14
JP2007088313A2007-04-05
JPH07263620A1995-10-13
Attorney, Agent or Firm:
Hidemi Kashima